module lib1(in1, in2, out);
  input   [6:0] in1;
  input [127:0] in2;
  output        out;
  assign out = in2[in1];
endmodule

module lib2(in1, in2, out);
  input   [6:0] in1;
  input [127:0] in2;
  output        out;
  assign out = in2[in1];
endmodule

module lib3(in1, in2, out);
  input   [6:0] in1;
  input [127:0] in2;
  output        out;
  assign out = in2[in1];
endmodule
